RTL Design Engineer

Location: Bangalore, Doha

Type: Full-Time | Hybrid possible

Start Date: Immediate

 

Job Description

 

Summary

Do you enjoy working in a creative, engaging, and entrepreneurial environment? We place high value on our teams and are committed to pursuing excellence for all our partners.

SilTest provides state-of-the-art semiconductor engineering, test and qualification services to customers around the world. We do that by creating practical, high-quality solutions that help semiconductor product developers bring ideas from concept to mass production efficiently and cost-effectively.

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Our fast-growing team is looking for experienced RTL Designers who can convert architecture and product intent into clean, synthesizable and verification-ready RTL for IPs, subsystems and SoCs.

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Typical Job Responsibilities:

If you tick more than half of these, you should consider talking to us.

 

• Develop microarchitecture from product requirements, architecture specifications and system constraints.

• Design and implement synthesizable RTL for IP blocks, subsystems, interfaces, control logic, datapaths and SoC integration components.

• Work closely with architecture, design verification, DFT, physical design, firmware and product engineering teams to close design intent across the full development flow.

• Create clear design specifications, interface definitions, register descriptions and implementation documentation.

• Run and debug lint, CDC/RDC, reset checks, synthesis, low-power checks and basic timing closure issues.

• Support design verification through test plan review, waveform debug, assertion review, coverage analysis and issue resolution.

• Integrate third-party or internally developed IPs and resolve interface, configuration, clocking and reset-related issues.

• Support ECOs, design changes, bug fixes and silicon bring-up investigations where RTL-level analysis is required.

• Automate routine design, integration, reporting and quality checks using scripts.

• Train others on what you learned.

 

 

Requirements

Key Qualifications

 

• 5 to 10 years of hands-on RTL design experience for semiconductor IPs, ASICs, SoCs or mixed-signal control logic.

• Strong Verilog/SystemVerilog coding skills and understanding of synthesizable design practices.

• Good understanding of microarchitecture, timing, clock/reset structures, CDC/RDC, low-power concepts and design-for-test implications.

• Experience with common SoC interfaces and protocols such as AMBA AXI/AHB/APB, SPI, I2C, UART, GPIO, memory interfaces or similar digital interfaces.

• Experience with EDA flows for lint, CDC, synthesis, simulation and basic timing constraint development.

• Ability to write clean, reusable, reviewable and maintainable RTL with strong attention to corner cases.

• Scripting skills in Python, Tcl, Perl or shell scripting for automation and flow support.

• Knowledge of semiconductor product development lifecycle and cross-functional design closure.

• Excellent communication in English and the ability to work in a multicultural, international team.

• A can-do attitude, ownership mindset and willingness to mentor less experienced engineers.

 

Benefits

What we offer

 

• A competitive compensation package

• A lucrative equity award

• Flexible work arrangement, hybrid or work from home, depending on the role

• Paid training at all levels

• Opportunity to work in an entrepreneurial environment and shape the future of the industry