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​Build Smarter Test Strategies

 
 
 
 
 
 
 
 

​DFT for Modern Managers

 

Overview.

 

This 2-day training equips people and program managers with a strategic and technical understanding of Design-for-Test (DfT) and wider DfX concepts. Participants learn how to engage effectively with design and test teams, evaluate trade-offs, and make informed project decisions.

The course blends lectures, walkthroughs, case studies, and group discussions, all tailored to leadership roles. It’s available on-site or remotely and is structured around your existing workflows and tooling.

​

TARGET AUDIENCE

  • Engineering Managers

  • Program Managers

  • Technical Project Leads

  • Product Owners

OBJECTIVES

 By the end of this course

 

  participants will be able to:

  • Design-for-Test techniques for Semiconductor Devices​

  • Important of DfT in product development 

  • Industry standards (IEEE 1149.1/1500/1687)​

  • How to manage ATPG, MBIST, scan, and boundary scan​

  •  Effectively interface with product development teams​

  • Hands-on case discussion with real product scenarios 

FORMAT & DELIVERY

  • Duration: 2 days, 4h per day

  • Mode: On-site or remote (customizable per team)

  • Style: Lecture, visual walkthroughs, case studies, group activities

  • Customization: Aligned with your tools, workflows, and project context

Course Curriculum.

 
 

DFT Concepts & Strategic Relevance

​

  • Welcome & Introduction to DfT and DfX

    Overview of the fundamentals and scope of Design for Test and broader DfX principles. (Lecture + Discussion)​

  • Why DfT matters in SoC development

    Strategic relevance of DfT in modern chip design cycles. (Lecture + Discussion)​

  • Key Business Drivers

    Exploring the impact of DfT on yield, test cost, time-to-market, and quality. (Case Study)​

  • Overview of DFT Techniques

    Introduction to Scan, BIST, LBIST, MBIST, JTAG, and Boundary Scan. (Visual Walkthrough)​

  • DFT in the Lifecycle

    Mapping where DfT fits from RTL to Silicon to Production. (Timeline Mapping)​

  • DfT & Test Coverage Explained

    Fault models (Stuck-at, Transition) and the cost/coverage relationship. (Lecture)​

  • DfT Architecture Trade-offs

    Analyzing trade-offs in area, performance, power, and routing. (Group Activity)​

  • Roles & Responsibilities

    Clarifying ownership between DfT, Design, Verification, and ATE teams. (RACI Matrix)​

  • Wrap-up & Q/A

    Open discussion on project risks and mitigation strategies. (Open Forum)

 
 
 
 

Execution, Challenges & Management Best Practices

​

  • DfT Project Planning
    What to plan for, including milestones, dependencies, and review points.     (Lecture)

  • DfT Flow & Tools
    Integration steps into RTL, ATPG, simulation, synthesis, and signoff.     (Toolchain Overview)

  • ATE & Production Test Considerations
    Addressing tester limitations, pattern count, and test time.     (Guest Session)

  • Cost & ROI of DfT/DfX
    Evaluating the cost of fault escapes versus DFT implementation overhead.     (Lecture)

  • DfT/DfX Quality Metrics
    Interpreting defect coverage, yield loss, and test escape metrics.     (KPI Dashboard)

  • Common Pitfalls & How to Avoid Them
    What typically causes DfT project delays or failures.     (Post-mortem Case Study)

  • Managing Cross-Team Collaboration
    How to apply DfT in Agile, Waterfall, or hybrid teams.     (Lecture + Discussion)

  • Final Panel & Action Plan
    Expert Q&A and takeaways for integrating best practices into your own teams.     (Panel + Feedback)

 
 
 

Instructor.

 
 
 
 

DFT expert with over 25 years of experience in product development with companies like 

Apple, Intel, Philips and NXP Semiconductors. Has led chip development projects across 

Europe, USA and Asia. Trained several engineers and managers on DfT topics.  

Deliverables.

 
 
 

 By the end of this course, participants will get:

​

  • DfT Manager’s Quick Guide (PDF summary of key concepts and workflows)

  • Sample Project Timeline & RACI Chart for role alignment and planning

  • Curated List of Industry-Standard Tools & Vendors used in DfT/DfX

  • Milestone-Based Checklists: Pre-silicon, Tape-out, and Post-silicon stages

Preparation.

 
 
 
 

Before attending, we recommend

​

  • Sharing a brief overview of your current DfT flow and tools

  • Listing key challenges or blockers you're facing in DfT implementation

  • Ensuring participation from both technical leads and decision-makers

Assesement.

 
 
 
 

​​​The following assessment activities are available to participants

​

  • Participants who attend the full course will receive a SilTest Academy certificate of attendance.

  • There will be a multiple-choice end of course test .

Seats are limited. Download the brochure or register your interest.

Frequently
Asked Questions.

If you still have questions please contact nermine.ben.aribia@siltest.com

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